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Sip PCB Assembly

SiP PCB Assembly refers to a board-level packaging service centered on System-in-Package (SiP) technology. It integrates multiple bare chips, passive components, and even Micro-Electro-Mechanical Systems (MEMS) onto a single PCB/substrate to form a "subsystem-level board-level package".
  • Maximum panel size 54 inches
  • Maximum panel thickness 0.450 inches

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Sip PCB parts prototypes

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Our Sip PCB Assembly Service Capabilities

Zintilon Technology is committed to providing advanced SiP PCB assembly services to global users, supporting SiP PCB assembly from prototype production in the product R&D stage to small-batch manufacturing. From printing to assembly, we ensure to deliver efficient and reliable SiP PCB assembly solutions for you.
2 D SiP

2-D SiP PCB Assembly

4 D SiP

4-D SiP PCB Assembly

Cavity SiP

Cavity SiP PCB Assembly

Sip PCB Assembly Materials

CategoryRecommended Model/SpecificationKey ParametersRemarks
Substrate① Coreless BT Build-up Board (ABF GX-13); ② Low-Temperature Co-fired Ceramic (LTCC)Dk: 3.4@10 GHz; Df: 0.004; CTE: 11–13 ppm; LTCC supports embedded passivesMinimum line width/spacing: 12 µm/12 µm; supports 4–6 build-up layers
Dielectric Build-up LayerABF GX-92 / Panasonic R-1515Thickness: 5 µm; Laser-drilled hole diameter: 40 µmCompatible with FC micro-bump systems
Copper FoilReverse Treated Foil (RTF) ≤ 1 ozSurface roughness (Ra) ≤ 2 µm; low high-frequency lossSuitable for millimeter-wave SiP
Encapsulation Adhesive① Low-Stress Epoxy (EP-121); ② High-Transmittance Silicone (OE-6650)CTE: 26 ppm; Tg: 120–140°C; Light transmittance: ≥ 90%Used for top potting or local encapsulation
Thermal Interface MaterialSilicone Pad or TIM (2–5 W/m·K)Thickness: 0.1–0.2 mm; Dielectric strength: ≥ 3 kVUsed between the package and housing/heat sink

Sip PCB Assembly Surface Finishes

AreaProcess CombinationThicknessPurpose
Entire BoardENEPIG (Electroless Nickel Electroless Palladium Immersion Gold)Ni 3–5 µm + Pd 0.05 µm + Au 0.03 µmCompatible with FC micro-bumps, gold wire bonding, and SMT placement
High-Frequency Antenna AreaOSP (Organic Solderability Preservative) or ImAg (Immersion Silver)0.15–0.3 µmMinimum skin effect loss; millimeter-wave insertion loss < 0.2 dB/inch
Edge ConnectorSelective Hard Gold PlatingNi 3–5 µm + Au 0.5–1.5 µmInsertion life ≥ 10,000 cycles

Why Choose Our
Sip PCB Assembly Service?

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One-on-One Quotation

Simply upload your .gbr file to receive a quotation feedback within 24 hours. Our professional engineers will analyze your design to avoid misunderstandings, communicate with you, and provide a reasonable price.

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High-Quality Assembled

We maintain a rigorous and responsible attitude toward materials, processes, surface treatments, A.O.I (Automated Optical Inspection), and flying probe testing, ensuring consistent high quality from prototype production to mass manufacturing.

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Fast Delivery

Equipped with advanced machinery and a professional quotation team to ensure fast delivery. We prioritize orders based on requirements and complexity. Cutomized delivery sulution is also available.

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Real-Time Communication

For your benefit, we provide full-cycle technical support for each customer from quotation to delivery. We will respond quickly to any questions until you confirm satisfactory SiP PCB assembly.

Sip PCB Assembly Standards

Zintilon ensures quality through our sip PCB assembly design and manufacturing standards from design to delivery by follow up IPC standards (IPC-2221C, IPC-6012E) to ensure manufacturability and reliability.

Parameter

Wire-Bond SiP

Flip-Chip SiP

Remark

Die bond area
Value/Requirement Pad + 0.2 mm per side
Source/Remarks Same
GB/T 44795-2024
Placement accuracy
Value/Requirement ±15 µm @ 3σ (wire)
Source/Remarks ±5 µm @ 3σ (flip)
JEDEC J-STD-035
NSMD pad opening
Value/Requirement Cu pad + 20–30 µm, reg. ±12 µm
Source/Remarks Same
IPC-2221C
Passive embed
Value/Requirement 0201-0603, 50 V, ±5 % tolerance
Source/Remarks Laser drill cavity, depth ≤0.1 mm
IPC-4761

Sip PCB Assembly Guidelines

Ensure precise tolerances, select appropriate materials, maintain clear CAD designs, and follow IPC for best results. Zintilon delivers accuracy, quality, and consistency in every sip PCB assembly.

Item

Value/Requirement

Source/Remarks

Micro-Bump Pitch
Value/Requirement ≥ 80 µm (mass production); 50 µm (laboratory)
Source/Remarks JEDEC JESD22-B117
Laser-Drilled Hole Diameter
Value/Requirement 40 µm ± 5 µm; Hole copper thickness ≥ 15 µm
Source/Remarks IPC-2221C
Line Width/Spacing
Value/Requirement 12 µm / 12 µm (ABF build-up layer)
Source/Remarks Insertion loss ≤ 0.25 dB/inch for 77 GHz high-frequency applications
Chip Cavity Opening
Value/Requirement Bare die periphery + 0.2 mm; Depth: 0.1–0.3 mm
Source/Remarks Prevents adhesive overflow to adjacent pads
Gold Wire Bonding Pad
Value/Requirement NSMD (Non-Solder-Mask-Defined); ≥ 100 µm × 100 µm; Pitch ≥ 75 µm
Source/Remarks Compatible with 25 µm gold wire
Encapsulation Adhesive Thickness
Value/Requirement Top potting: 0.3–0.8 mm; Local encapsulation: 0.2 mm
Source/Remarks Hardness: 60–95 Shore D; CTE: 26 ppm
Reflow Cycles
Value/Requirement ≤ 3 cycles; Peak temperature ≤ 260°C
Source/Remarks Meets MSL 3 requirements
Thermal Cycling
Value/Requirement -40 ↔ +125°C for 500 cycles; Wire tensile strength reduction ≤ 20%
Source/Remarks IPC-A-610 G Class 3

Our Custom Sip PCB Assembly Service for Various Industrial Applications

SiP PCB Assembly (System in Package PCB Assembly) leverages four core advantages: "ultra-high integration, cross-chip collaboration, miniaturized architecture, and low-power interconnection". It has become the "integrated functional hub" for high-end electronic devices, covering core application scenarios from portable terminals to cutting-edge computing power.

Sip PCB Assembly FAQs

We cooperate with multiple certification bodies and can handle CE certification, FCC certification, RoHS certification, FDA certification, etc.

We have a highly professional engineering team with extensive design experience in fields such as industrial control, consumer electronics, new energy, and medical devices.

Throughout the product development process, we confirm each step with the client. If the project design includes sample testing, we will conduct electrical performance testing, functional testing, performance testing, and reliability testing to ensure design quality.
Got any more questions?
Ultimate Guide 
to Sip PCB Assembly

Sip PCB Assembly

Various and Robust Sip PCB Assembly Services
prototyping
Prototype

Prototyping

From Gerber files to circuit boards, our professional engineering team provides you with the highest quality rigid PCB manufacturing services. We meticulously control every detail of the process, including drilling, electroplating, and AOI, ensuring precise control over trace spacing, thickness, and panel dimensions. We are committed to providing you with the most reliable PCB assembly.
  • Complete production line
  • Professional engineering support
  • 10+ years‘ manufacturing experience
production
Production

Production

We have our own production lines and a robust manufacturing network. From PCB design, engineering, and manufacturing, we have sufficient capacity to provide you with professional and fast delivery services, whether for small or large batches. We spare no effort in providing consistent mass production services for your products.
  • Strong supply chain team
  • Competitive pricing
  • One-stop service from design to delivery

Sip PCB Assembly
Service at Zintilon


What is sip PCB

SiP PCB stands for “System-in-Package Printed Circuit Board.”
It packs an entire electronic system—processor, memory, RF, power management, passives, etc.—into a single large package, and the base of that package is a specially designed PCB substrate (often called the SiP substrate or SiP carrier).

In one sentence: SiP PCB is not an ordinary mainboard but a system-level carrier inside the package that bundles “chips + passives + traces + antennas” in one shot, exposing only a few solder balls or LGA pads to the outside.

SiP PCB = a specialty HDI carrier that “shrinks a whole mainboard into a single chip”—it’s packaging, not board-level.

What is the difference between SiP and SoC?

SoC = “a whole computer in one silicon die”; SiP = “a whole computer in one package”.

  • Integration level: SoC = inside a single silicon die; SiP = inside a package (multi-die + components)
  • Process: SoC = front-end wafer lithography, ion implant; SiP = back-end packaging, substrate routing, pick-and-place
  • Function make-up: SoC = CPU/GPU/RF/PHY all on one silicon chip; SiP = multiple dies + passives + antennas + traces
  • Design complexity: SoC = wafer-level IP integration, high mask cost; SiP = package routing + component placement, low mask cost
  • Size: SoC = smallest (single die); SiP = larger than SoC, smaller than PCB
  • Performance/power: SoC = on-chip bus, low latency, low power; SiP = in-package routing, slightly higher, still better than PCB
  • Development cycle: SoC = 18–30 months (IP verification); SiP = 6–12 months (package + substrate)
  • Typical applications: SoC = phone AP, PC CPU, Bluetooth SoC; SiP = TWS earbud MCU, 5G RF front-end, automotive radar
  • Cost structure: SoC = high mask cost, suited for high-volume consumer; SiP = low mask cost, suited for heterogeneous/RF/high pin-count
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